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Travelled to:
1 × Italy
1 × Taiwan
1 × United Kingdom
2 × France
2 × USA
Collaborated with:
P.L.Guernic J.Talpin L.Besnard V.C.Ngo I.M.Smarandache J.C.d.Kergommeaux Y.Denneulin Y.Ma H.Yu S.Guelton J.Pazat S.Varrette M.Heitz Y.Glouche A.Toom O.Laurent
Talks about:
system (3) valid (3) time (3) transform (2) polychron (2) synchron (2) signal (2) compil (2) clock (2) real (2)

Person: Thierry Gautier

DBLP DBLP: Gautier:Thierry

Contributed to:

FASE 20152015
DATE 20132013
IFM 20122012
SAC 20112011
PDP 20092009
World Congress on Formal Methods 19991999
HPCA 19991999
FPCA 19871987

Wrote 8 papers:

FASE-2015-NgoTGG #compilation #validation
Translation Validation for Clock Transformations in a Synchronous Compiler (VCN, JPT, TG, PLG), pp. 171–185.
DATE-2013-MaYGGTBH #analysis #architecture #towards #validation
Toward polychronous analysis and validation for timed software architectures in AADL (YM, HY, TG, PLG, JPT, LB, MH), pp. 1173–1178.
IFM-2012-NgoTGGB #compilation #equation #verification
Formal Verification of Compiler Transformations on Polychronous Equations (VCN, JPT, TG, PLG, LB), pp. 113–127.
SAC-2011-YuMGTBGGTL #using
System-level co-simulation of integrated avionics using polychrony (HY, YM, YG, JPT, LB, TG, PLG, AT, OL), pp. 354–359.
PDP-2009-GueltonGPV #adaptation
Dynamic Adaptation Applied to Sabotage Tolerance (SG, TG, JLP, SV), pp. 237–244.
FM-v2-1999-SmarandacheGG #calculus #constraints #realtime #validation
Validation of Mixed SIGNAL-ALPHA Real-Time Systems through Affine Calculus on Clock Synchronisation Constraints (IMS, TG, PLG), pp. 1364–1383.
HPCA-1999-KergommeauxDG #parallel
Parallel Computing for Irregular Applications (JCdK, YD, TG), p. 321.
FPCA-1987-GautierG #declarative #named #programming #realtime
SIGNAL: A declarative language for synchronous programming of real-time systems (TG, PLG), pp. 257–277.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.