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Travelled to:
1 × Denmark
1 × Greece
1 × USA
Collaborated with:
T.Kitai C.J.Myers A.Shibayama B.Schlingloff E.M.Clarke
Talks about:
time (3) verif (2) constraint (1) asynchron (1) parallel (1) theoret (1) circuit (1) automat (1) analysi (1) system (1)

Person: Tomohiro Yoneda

DBLP DBLP: Yoneda:Tomohiro

Contributed to:

CAV 20022002
CAV 20002000
CAV 19931993

Wrote 3 papers:

CAV-2002-YonedaKM #analysis #automation #constraints
Automatic Derivation of Timing Constraints by Failure Analysis (TY, TK, CJM), pp. 195–208.
CAV-2000-Yoneda #named #verification
VINAS-P: A Tool for Trace Theoretic Verification of Timed Asynchronous Circuits (TY), pp. 572–575.
CAV-1993-YonedaSSC #parallel #performance #realtime #verification
Efficient Verification of Parallel Real-Time Systems (TY, AS, BHS, EMC), pp. 321–346.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.