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Travelled to:
1 × USA
Collaborated with:
C.Y.R.Chen
Talks about:
transistor (1) techniqu (1) reorder (1) matrix (1) layout (1) gate (1)

Person: Uminder Singh

DBLP DBLP: Singh:Uminder

Contributed to:

DAC 19901990

Wrote 1 papers:

DAC-1990-SinghC #layout #matrix #order
A Transistor Reordering Technique for Gate Matrix Layout (US, CYRC), pp. 462–467.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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