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Travelled to:
3 × USA
Collaborated with:
S.P.Amarasinghe A.Agarwal M.Frank M.B.Taylor R.Barua D.Srikrishna J.Babb V.Sarkar K.Mackenzie J.Kubiatowicz V.Lee M.F.Kaashoek
Talks about:
interconnect (1) architectur (1) parallel (1) instruct (1) deliveri (1) schedul (1) protect (1) operand (1) network (1) exploit (1)

Person: Walter Lee

DBLP DBLP: Lee:Walter

Contributed to:

HPCA 20032003
ASPLOS 19981998
HPCA 19981998

Wrote 3 papers:

HPCA-2003-TaylorLAA #architecture #network
Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architecture (MBT, WL, SPA, AA), pp. 341–353.
ASPLOS-1998-LeeBFSBSA #parallel #scheduling
Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine (WL, RB, MF, DS, JB, VS, SPA), pp. 46–57.
HPCA-1998-MackenzieKFLLAK #performance
Exploiting Two-Case Delivery for Fast Protected Messaging (KM, JK, MF, WL, VL, AA, MFK), pp. 231–242.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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