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Travelled to:
1 × France
Collaborated with:
J.Kang S.Lin V.Akella
Talks about:
process (1) acceler (1) vector (1) cyclic (1) quasi (1) ldpc (1) fpga (1) emul (1) code (1) base (1)

Person: Xiaoheng Chen

DBLP DBLP: Chen:Xiaoheng

Contributed to:

DATE 20092009

Wrote 1 papers:

DATE-2009-ChenKLA
Accelerating FPGA-based emulation of quasi-cyclic LDPC codes with vector processing (XC, JK, SL, VA), pp. 1530–1535.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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