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Travelled to:
1 × China
1 × USA
Collaborated with:
R.Kumar H.Duwe Harrison Williams M.Hicks
Talks about:
correct (3) intermitt (1) overhead (1) reliabl (1) predict (1) exploit (1) chipkil (1) memori (1) latenc (1) forget (1)

Person: Xun Jian

DBLP DBLP: Jian:Xun

Contributed to:

HPCA 20152015
HPCA 20132013
ASPLOS 20202020

Wrote 3 papers:

HPCA-2015-DuweJ0 #fault #latency #predict
Correction prediction: Reducing error correction latency for on-chip memories (HD, XJ, RK), pp. 463–475.
HPCA-2013-JianK #adaptation #reliability
Adaptive Reliability Chipkill Correct (ARCC) (XJ, RK), pp. 270–281.
ASPLOS-2020-WilliamsJH
Forget Failure: Exploiting SRAM Data Remanence for Low-overhead Intermittent Computation (HW, XJ, MH), pp. 69–84.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.