BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × Australia
1 × India
1 × Spain
2 × China
2 × France
2 × Germany
5 × USA
Collaborated with:
J.Sartori X.Jian A.B.Kahng S.Kang D.L.Jones S.Kang H.S.Sawhney H.Duwe J.Sloan B.Ahrens T.Chan P.Gupta J.Gu S.S.Lumetta Y.Sun N.R.Shanbhag R.A.Abdallah S.Narayanan C.Rao Y.Guo S.Samarasekera S.C.Hsu K.J.Hanna J.C.Asmuth A.Pope S.Hsu
Talks about:
processor (5) design (4) stochast (3) correct (3) power (3) reliabl (2) registr (2) imageri (2) video (2) error (2)

Person: Rakesh Kumar

DBLP DBLP: Kumar:Rakesh

Contributed to:

HPCA 20152015
HPCA 20132013
DAC 20122012
HPCA 20122012
DATE 20112011
HPCA 20112011
DAC 20102010
DATE 20102010
HPCA 20102010
DATE 20092009
DATE 20082008
ICPR v2 20062006
ICPR v4 20002000
ICPR 19981998

Wrote 16 papers:

HPCA-2015-DuweJ0 #fault #latency #predict
Correction prediction: Reducing error correction latency for on-chip memories (HD, XJ, RK), pp. 463–475.
HPCA-2013-JianK #adaptation #reliability
Adaptive Reliability Chipkill Correct (ARCC) (XJ, RK), pp. 270–281.
DAC-2012-SartoriK #compilation #energy #performance
Compiling for energy efficiency on timing speculative processors (JS, RK), pp. 1301–1308.
DAC-2012-SloanSK #design #on the #probability
On software design for stochastic processors (JS, JS, RK), pp. 918–923.
HPCA-2012-SartoriAK #pipes and filters
Power balanced pipelines (JS, BA, RK), pp. 261–272.
DATE-2011-ChanSGK #on the
On the efficacy of NBTI mitigation techniques (TBC, JS, PG, RK), pp. 932–937.
HPCA-2011-GuLKS #named
MOPED: Orchestrating interprocess message data on CMPs (JG, SSL, RK, YS), pp. 111–120.
DAC-2010-KahngKKS #design #power management
Recovery-driven design: a power minimization methodology for error-tolerant processor modules (ABK, SK, RK, JS), pp. 825–830.
DAC-2010-ShanbhagAKJ #probability
Stochastic computation (NRS, RAA, RK, DLJ), pp. 859–864.
DATE-2010-NarayananSKJ #probability #scalability
Scalable stochastic processors (SN, JS, RK, DLJ), pp. 335–338.
HPCA-2010-KahngKKS #design #reliability #trade-off
Designing a processor from the ground up to allow voltage/reliability tradeoffs (ABK, SK, RK, JS), pp. 1–11.
DATE-2009-SartoriK #architecture #distributed #manycore #power management
Distributed peak power management for many-core architectures (JS, RK), pp. 1556–1559.
DATE-2008-KangK #design #framework #machine learning #manycore #named #optimisation #performance
Magellan: A Search and Machine Learning-based Framework for Fast Multi-core Design Space Exploration and Optimization (SK, RK), pp. 1432–1437.
ICPR-v2-2006-RaoGSK #image
A Heterogeneous Feature-based Image Alignment Method (CR, YG, HSS, RK), pp. 345–350.
ICPR-v4-2000-KumarSHH #video
Registration of Highly-Oblique and Zoomed in Aerial Video to Reference Imagery (RK, SS, SCH, KJH), pp. 4303–4307.
ICPR-1998-0001SAPH #video
Registration of video to geo-referenced imagery (RK, HSS, JCA, AP, SH), pp. 1393–1400.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.