BibSLEIGH corpus
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Used together with:
simul (2)
multilay (2)
wire (2)
print (2)
mode (1)

Stem backplan$ (all stems)

5 papers:

DACDAC-1996-TodescoM #named #parallel #simulation
Symphony: A Simulation Backplane for Parallel Mixed-Mode Co-Simulation of VLSI Systems (ARWT, THYM), pp. 149–154.
DACDAC-1993-WanG #layout #named
ABLE: AMD Backplane for Layout Engines (KWW, RAG), pp. 556–560.
ASPLOSASPLOS-1989-ArnouldBCKSS #design #multi #network
The Design of Nectar: A Network Backplane for Heterogeneous Multicomputers (EAA, FJB, ECC, HTK, RDS, PS), pp. 205–216.
DACDAC-1973-Foster #multi
A router for multilayer printed wiring backplanes (JCF), pp. 44–49.
DACDAC-1973-So #multi
Pin assignment of circuit cards and the routability of multilayer printed wiring backplanes (HCS), pp. 33–43.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.