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Used together with:
system (2)
gap (1)
simul (1)
architectur (1)
case (1)

Stem bluespec$ (all stems)

2 papers:

SACSAC-2008-GruianW #architecture #case study #embedded #java
VHDL vs. Bluespec system verilog: a case study on a Java embedded architecture (FG, MW), pp. 1492–1497.
DATEDATE-2007-PatelS #abstraction
Tackling an abstraction gap: co-simulating SystemC DE with bluespec ESL (HDP, SKS), pp. 279–284.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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