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Used together with:
risc (4)
architectur (2)
contemporari (1)
code (1)
implement (1)

Stem cisc$ (all stems)

6 papers:

HPCAHPCA-2013-BlemMS #architecture
Power struggles: Revisiting the RISC vs. CISC debate on contemporary ARM and x86 architectures (ERB, JM, KS), pp. 1–12.
HPCAHPCA-2006-HuKLS #approach #implementation #performance
An approach for implementing efficient superscalar CISC processors (SH, IK, MHL, JES), pp. 41–52.
Optimal Spilling for CISC Machines with Few Registers (AWA, LG), pp. 243–253.
ASPLOSASPLOS-1992-AndrewsS #migration #product line
Migrating a CISC Computer Family onto RISC via Object Code Translation (KA, DS), pp. 213–222.
ASPLOSASPLOS-1991-BhandarkarC #architecture #hardware #performance
Performance From Architecture: Comparing a RISC and CISC with Similar Hardware Organization (DB, DWC), pp. 310–319.
ASPLOSASPLOS-1987-BorrielloCDN #case study #prolog
RISCs versus CISCs for Prolog: A Case Study (GB, ARC, PBD, MNN), pp. 136–145.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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