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Used together with:
budget (2)
chip (2)
power (1)
hierarch (1)
base (1)

Stem decap$ (all stems)

3 papers:

DATEDATE-2014-ChenTCC #effectiveness
Cost-effective decap selection for beyond die power integrity (YEC, THT, SHC, HMC), pp. 1–4.
DACDAC-2010-ZhaoGFH #optimisation #parallel
Parallel hierarchical cross entropy optimization for on-chip decap budgeting (XZ, YG, ZF, SH), pp. 843–848.
DACDAC-2005-LiQTWCH #approach #clustering #performance
Partitioning-based approach to fast on-chip decap budgeting and minimization (HL, ZQ, SXDT, LW, YC, XH), pp. 170–175.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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