BibSLEIGH corpus
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Used together with:
memori (3)
chip (3)
data (3)
execut (2)
awar (2)

Stem dma$ (all stems)

8 papers:

SACSAC-2012-ZhongGHCW #memory management
Affinity-aware DMA buffer management for reducing off-chip memory access (QZ, XG, TH, XC, KW), pp. 1588–1593.
PPoPPPPoPP-2011-DonaldsonKR #analysis #automation #named
SCRATCH: a tool for automatic analysis of dma races (AFD, DK, PR), pp. 311–312.
HPCAHPCA-2010-TangBHC #architecture #cpu #performance #using
DMA cache: Using on-chip storage to architecturally separate I/O data from CPU data for improving I/O performance (DT, YB, WH, MC), pp. 1–12.
HPCAHPCA-2010-VujicGCRMA #on the fly
DMA++: on the fly data realignment for on-chip memories (NV, MG, FC, AR, XM, EA), pp. 1–12.
HPCAHPCA-2006-PandeyJZB #energy #memory management
DMA-aware memory energy management (VP, WJ, YZ, RB), pp. 133–144.
HPCAHPCA-1997-MarkatosK #kernel #operating system
User-Level DMA without Operating System Kernel Modification (EPM, MK), pp. 322–331.
HPCAHPCA-1996-BlumrichDFL #interface #network
Protected, User-Level DMA for the SHRIMP Network Interface (MAB, CD, EWF, KL), pp. 154–165.
LCTESLCT-RTS-1995-HuangL #concurrent #execution #predict #worst-case
Predicting the Worst-Case Execution Time of the Concurrent Execution of Instructions and Cycle-Stealing DMA I/O Operations (TYH, JWSL), pp. 1–6.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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