6 papers:
DAC-2011-CevreroRSBIL #library #logic #power management #standard- Power-gated MOS current mode logic (PG-MCML): a power aware DPA-resistant standard cell library (AC, FR, MS, SB, PI, YL), pp. 1014–1019.
DATE-2010-IzumiISO #multi- Improved countermeasure against Address-bit DPA for ECC scalar multiplication (MI, JI, KS, KO), pp. 981–984.
- DATE-2009-LomneMTRSC #evaluation #logic #robust
- Evaluation on FPGA of triple rail logic robustness against DPA and DEMA (VL, PM, LT, MR, RS, NC), pp. 634–639.
- DATE-2007-LinFYL #design #encryption #hardware
- Overcoming glitches and dissipation timing skews in design of DPA-resistant cryptographic hardware (KJL, SCF, SHY, CCL), pp. 1265–1270.
- DATE-2005-BouesseRDG #formal method
- DPA on Quasi Delay Insensitive Asynchronous Circuits: Formalization and Improvement (GFB, MR, SD, FG), pp. 424–429.
- DATE-v1-2004-TiriV #design #implementation #logic
- A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation (KT, IV), pp. 246–251.
