7 papers:
- DAC-1986-Gerveshi #comparison #logic
- Comparison of CMOS PLA and polycell representations of control logic (CMG), pp. 638–642.
- DAC-1982-KambeCKION #algorithm #evaluation
- A placement algorithm for polycell LSI and ITS evaluation (TK, TC, SK, TI, NO, IN), pp. 655–662.
- DAC-1981-LeeCJ #automation #generative
- Automatic generation and characterization of CMOS polycells (CML, BRC, SJ), pp. 220–224.
- DAC-1981-MartinBLMMTW #design #named #problem
- CELTIC — solving the problems of LSI design with an integrated polycell DA system (GM, JB, TL, DM, JM, DT, LW), pp. 804–811.
- DAC-1979-KawamotoK
- The minimum width routing of A 2-row 2-layer polycell-layout (TK, YK), pp. 290–296.
- DAC-1976-Persky #automation #layout #named #string
- PRO — an automatic string placement program for polycell layout (GP), pp. 417–424.
- DAC-1973-KernighanSP #algorithm
- An optimum channel-routing algorithm for polycell layouts of integrated circuits (BWK, DGS, GP), pp. 50–59.