20 papers:
- DAC-2015-ChenSC #flexibility
- A SPICE model of flexible transition metal dichalcogenide field-effect transistors (YYC, ZS, DC), p. 6.
- DATE-2015-ChenWY #parallel #performance
- A fast parallel sparse solver for SPICE-based circuit simulators (XC, YW, HY), pp. 205–210.
- DATE-2015-LiJHWCGLKW #design #optimisation #using
- Variation-aware, reliability-emphasized design and optimization of RRAM using SPICE model (HL, ZJ, PH, YW, HYC, BG, XYL, JFK, HSPW), pp. 1425–1430.
- DATE-2014-GholipourCSC #modelling #scalability
- Highly accurate SPICE-compatible modeling for single- and double-gate GNRFETs with studies on technology scaling (MG, YYC, AS, DC), pp. 1–6.
- RE-2014-LiHMGGB0 #non-functional #ontology #requirements
- Non-functional requirements as qualities, with a spice of ontology (FLL, JH, JM, RSSG, GG, AB, LL), pp. 293–302.
- DAC-2013-HanZF #gpu #named #parallel #simulation
- TinySPICE: a parallel SPICE simulator on GPU for massively repeated small circuit simulations (LH, XZ, ZF), p. 8.
- DATE-2013-ChenRSIFC #analysis #process
- A SPICE-compatible model of graphene nano-ribbon field-effect transistors enabling circuit-level delay and power analysis under process variation (YYC, AR, AS, GI, GF, DC), pp. 1789–1794.
- DATE-2013-LyrasRPS #multi #scalability #simulation
- Hypervised transient SPICE simulations of large netlists & workloads on multi-processor systems (GL, DR, AP, DS), pp. 655–658.
- DAC-2012-ZhaoF #on the fly #performance #simulation #towards
- Towards efficient SPICE-accurate nonlinear circuit simulation with on-the-fly support-circuit preconditioners (XZ, ZF), pp. 1119–1124.
- PPoPP-2011-FengGH #commit #named #parallel #scalability
- SpiceC: scalable parallelism via implicit copying and explicit commit (MF, RG, YH), pp. 69–80.
- DATE-2009-KirchnerBG #simulation #using
- Analogue mixed signal simulation using spice and SystemC (TK, NB, CG), pp. 284–287.
- CGO-2008-RamanVRA #execution #named #parallel
- Spice: speculative parallel iteration chunk execution (ER, NV, RR, DIA), pp. 175–184.
- ICEIS-ISAS-2006-GrimanPM #approach #development #guidelines #process
- Methodological Guidelines for SQA in Development Process — An Approach Based on the SPICE Model (AG, MAP, LEM), pp. 269–275.
- DATE-DF-2004-Thiel #validation
- Have I Really Met Timing? — Validating PrimeTime Timing Reports with Spice (TT), pp. 114–119.
- DATE-v2-2004-JiangC #named
- SCORE: SPICE COmpatible Reluctance Extraction (RJ, CCPC), pp. 948–953.
- DATE-2000-Perez-MontesMDFR #named
- XFridge: A SPICE-Based, Portable, User-Friendly Cell-Level Sizing Tool (FMPM, FM, RDC, FVF, ÁRV), p. 739.
- SAC-1995-Beams #approach #development
- Adding spice to software development: a software development approach designed for rapidly changing environments (JDB), pp. 384–389.
- DAC-1993-ChouCC #finite #modelling #performance #simulation #using
- High-Speed Interconnect Modeling and High-Accuracy Simulation Using SPICE and Finite Element Methods (TYC, JC, ZJC), pp. 684–690.
- DAC-1992-RaghavanBR #named #performance #problem #simulation
- AWESpice: A General Tool for the Accurate and Efficient Simulation of Interconnect Problems (VR, JEB, RAR), pp. 87–92.
- DAC-1986-FreemanKLN #automation #layout #matrix #modelling
- Automated extraction of SPICE circuit models from symbolic gate matrix layout with pruning (RDF, SMK, CGLH, MLN), pp. 418–424.