Combine and top down block placement algorithm for hierarchical logic VLSI layout
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Tokinori Kozawa, Chihei Miura, Hidekazu Terai
Combine and top down block placement algorithm for hierarchical logic VLSI layout
DAC, 1984.

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@inproceedings{DAC-1984-KozawaMT,
	acmid         = "800876",
	author        = "Tokinori Kozawa and Chihei Miura and Hidekazu Terai",
	booktitle     = "{Proceedings of the 21st Design Automation Conference}",
	isbn          = "0-8186-0542-1",
	pages         = "667--669",
	publisher     = "{ACM/IEEE}",
	title         = "{Combine and top down block placement algorithm for hierarchical logic VLSI layout}",
	year          = 1984,
}

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