BibSLEIGH — Optimal Clock Period FPGA Technology Mapping for Sequential Circuits

Peichen Pan, C. L. Liu
Optimal Clock Period FPGA Technology Mapping for Sequential Circuits
DAC, 1996.

DAC 1996

@inproceedings{DAC-1996-PanL,
	author        = "Peichen Pan and C. L. Liu",
	booktitle     = "{Proceedings of the 33rd Design Automation Conference}",
	doi           = "10.1145/240518.240655",
	isbn          = "0-89791-779-0",
	pages         = "720--725",
	publisher     = "{ACM Press}",
	title         = "{Optimal Clock Period FPGA Technology Mapping for Sequential Circuits}",
	year          = 1996,
}

Peichen Pan, C. L. LiuOptimal Clock Period FPGA Technology Mapping for Sequential CircuitsDAC, 1996.

Peichen Pan, C. L. Liu
Optimal Clock Period FPGA Technology Mapping for Sequential Circuits
DAC, 1996.