Circuit-wise buffer insertion and gate sizing algorithm with scalability
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Zhanyuan Jiang, Weiping Shi
Circuit-wise buffer insertion and gate sizing algorithm with scalability
DAC, 2008.

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@inproceedings{DAC-2008-JiangS,
	author        = "Zhanyuan Jiang and Weiping Shi",
	booktitle     = "{Proceedings of the 45th Design Automation Conference}",
	doi           = "10.1145/1391469.1391652",
	isbn          = "978-1-60558-115-6",
	pages         = "708--713",
	publisher     = "{ACM}",
	title         = "{Circuit-wise buffer insertion and gate sizing algorithm with scalability}",
	year          = 2008,
}

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