BibSLEIGH — A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification

Kees Goossens, John Dielissen, Om Prakash Gangwal, Santiago González Pestana, Andrei Radulescu, Edwin Rijpkema
A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification
DATE, 2005.

DATE 2005

@inproceedings{DATE-2005-GoossensDGPRR,
	author        = "Kees Goossens and John Dielissen and Om Prakash Gangwal and Santiago González Pestana and Andrei Radulescu and Edwin Rijpkema",
	booktitle     = "{Proceedings of the Ninth Conference on Design, Automation and Test in Europe}",
	doi           = "10.1109/DATE.2005.11",
	isbn          = "0-7695-2288-2",
	pages         = "1182--1187",
	publisher     = "{IEEE Computer Society}",
	title         = "{A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification}",
	year          = 2005,
}

Kees Goossens, John Dielissen, Om Prakash Gangwal, Santiago González Pestana, Andrei Radulescu, Edwin RijpkemaA Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and VerificationDATE, 2005.

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Kees Goossens, John Dielissen, Om Prakash Gangwal, Santiago González Pestana, Andrei Radulescu, Edwin Rijpkema
A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification
DATE, 2005.