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Travelled to:
1 × France
1 × Germany
Collaborated with:
O.P.Gangwal A.Radulescu E.Rijpkema K.G.W.Goossens K.Goossens J.Dielissen
Talks about:
perform (2) network (2) design (2) chip (2) guarante (1) approach (1) acceler (1) specif (1) applic (1) verif (1)

Person: Santiago González Pestana

DBLP DBLP: Pestana:Santiago_Gonz=aacute=lez

Contributed to:

DATE 20052005
DATE v2 20042004

Wrote 2 papers:

DATE-2005-GoossensDGPRR #design #network #performance #verification
A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification (KG, JD, OPG, SGP, AR, ER), pp. 1182–1187.
DATE-v2-2004-PestanaRRGG #approach #network #trade-off
Cost-Performance Trade-Offs in Networks on Chip: A Simulation-Based Approach (SGP, ER, AR, KGWG, OPG), pp. 764–769.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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