A thermal resilient integration of many-core microprocessors and main memory by 2.5D TSI I/Os
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Sih-Sian Wu, Kanwen Wang, Sai Manoj Pudukotai Dinakarrao, Tsung-Yi Ho, Mingbin Yu, Hao Yu
A thermal resilient integration of many-core microprocessors and main memory by 2.5D TSI I/Os
DATE, 2014.

DATE 2014
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@inproceedings{DATE-2014-WuWDHYY,
	author        = "Sih-Sian Wu and Kanwen Wang and Sai Manoj Pudukotai Dinakarrao and Tsung-Yi Ho and Mingbin Yu and Hao Yu",
	booktitle     = "{Proceedings of the 18th Conference and Exhibition on Design, Automation and Test in Europe}",
	doi           = "10.7873/DATE.2014.190",
	pages         = "1--4",
	publisher     = "{IEEE}",
	title         = "{A thermal resilient integration of many-core microprocessors and main memory by 2.5D TSI I/Os}",
	year          = 2014,
}

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