BibSLEIGH — Hao

Travelled to:

1 × China
1 × Japan
3 × Germany
4 × France
8 × USA

Collaborated with:

L.He S.M.P.Dinakarrao F.Gong K.Wang Y.Shi X.Liu S.X.Tan C.Zhang L.Rauchwerger S.Naoi Y.Wang H.Huang Y.Song Y.Xia S.Zhang C.Chu D.Sylvester P.Kong B.Wang H.Wang W.Wu R.Liu Y.Wang P.Mesa J.Chien R.Hsu H.Lin S.Chang S.Wu T.Ho M.Yu D.Kim J.Ren J.Sun Z.Wang F.Nishino Y.Katsuyama X.Chang Y.Ma H.Franke K.Wang R.Hou T.Nelms L.Ni M.Yan C.Weng W.Yang J.Zhao R.K.Sahoo C.Howson G.Almasi J.G.Castaños M.Gupta J.E.Moreira J.J.Parker T.Engelsiepen R.B.Ross R.Thakur R.Latham W.D.Gropp

Talks about:

base (8) analysi (5) power (5) circuit (4) effici (4) imag (4) microprocessor (3) thermal (3) perform (3) extract (3)

Person: Hao Yu

DBLP: Yu:Hao

Contributed to:

2015

2014

2013

2012

2011

2010

2009

2007

2006

2003

2000

Wrote 23 papers:

DATE-2015-WangHNYYWYZ #energy #in memory #recognition: An energy-efficient non-volatile in-memory accelerator for sparse-representation based face recognition (YW, HH, LN, HY, MY, CW, WY, JZ), pp. 932–935.
DATE-2014-ChienYHLC #analysis #geometry #image: Package geometric aware thermal analysis by infrared-radiation thermal images (JHC, HY, RSH, HJL, SCC), pp. 1–4.
DATE-2014-SongDY #analysis #bound #multi #order #parametricity #performance #reduction: Zonotope-based nonlinear model order reduction for fast performance bound analysis of analog circuits with multiple-interval-valued parameter variations (YS, SMPD, HY), pp. 1–6.
DATE-2014-WangYSK #encryption #energy #in memory #performance: Energy efficient in-memory AES encryption based on nonvolatile domain-wall nanowire (YW, HY, DS, PK), pp. 1–4.
DATE-2014-WuWDHYY #in memory #integration #manycore #memory management: A thermal resilient integration of many-core microprocessors and main memory by 2.5D TSI I/Os (SSW, KW, SMPD, TYH, MY, HY), pp. 1–4.
DAC-2013-DinakarraoWY #3d #multi #reduction: Peak power reduction and workload balancing by space-time multiplexing based demand-supply matching for 3D thousand-core microprocessor (SMPD, KW, HY), p. 6.
DATE-2013-WangYWZ #3d #configuration management #manycore #network: 3D reconfigurable power switch network for demand-supply matching between multi-output power converters and many-core microprocessors (KW, HY, BW, CZ), pp. 1643–1648.
DATE-2012-LiuTWY #simulation: A GPU-accelerated envelope-following method for switching power converter simulation (XL, SXDT, HW, HY), pp. 1349–1354.
DATE-2012-ZhangWHY #algorithm #energy #game studies #resource management: Fair energy resource allocation by minority game algorithm for smart buildings (CZ, WW, HH, HY), pp. 63–68.
ICPR-2012-LiuWYN #correlation #image: A renewed image annotation baseline by image embedding and tag correlation (RL, YW, HY, SN), pp. 3216–3219.
DAC-2011-GongYH #analysis #monte carlo #orthogonal #performance #probability: Fast non-monte-carlo transient noise analysis for high-precision analog/RF circuits by stochastic orthogonal polynomials (FG, HY, LH), pp. 298–303.
DATE-2011-ChangMFWHYN #architecture #hardware #hybrid #optimisation: Optimization of stateful hardware acceleration in hybrid architectures (XC, YM, HF, KW, RH, HY, TN), pp. 567–570.
DAC-2010-GongYSKRH #constraints #estimation #named #parametricity #performance: QuickYield: an efficient global-search based parametric yield estimation with performance constraints (FG, HY, YS, DK, JR, LH), pp. 392–397.
DAC-2010-LiuYT #algorithm #analysis #performance #robust #scalability: A robust periodic arnoldi shooting algorithm for efficient analysis of large-scale RF/MM ICs (XL, HY, SXDT), pp. 573–578.
CIKM-2009-XiaYZ #automation #using #web: Automatic web data extraction using tree alignment (YX, HY, SZ), pp. 1645–1648.
DAC-2009-GongYH #incremental #named #parallel #probability #process: PiCAP: a parallel and incremental capacitance extraction considering stochastic process variation (FG, HY, LH), pp. 764–769.
DAC-2007-YuCH #co-evolution #design: Off-chip Decoupling Capacitor Allocation for Chip Package Co-Design (HY, CC, LH), pp. 618–621.
DAC-2006-ShiMYH #simulation: Circuit simulation based obstacle-aware Steiner routing (YS, PM, HY, LH), pp. 385–388.
DAC-2006-YuSH #analysis #grid #order #performance #power management #reduction: Fast analysis of structured power grid by triangularization based structure preserving model order reduction (HY, YS, LH), pp. 205–210.
HPCA-2006-YuSHACGMPERTLG #performance: High performance file I/O for the Blue Gene/L supercomputer (HY, RKS, CH, GA, JGC, MG, JEM, JJP, TE, RBR, RT, RL, WDG), pp. 187–196.
DAC-2003-YuH: Vector potential equivalent circuit based on PEEC inversion (HY, LH), pp. 718–723.
DocEng-2003-SunWYNKN #effectiveness #image #recognition: Effective text extraction and recognition for WWW images (JS, ZW, HY, FN, YK, SN), pp. 115–117.
CC-2000-YuR #parallel #runtime: Techniques for Reducing the Overhead of Run-Time Parallelization (HY, LR), pp. 232–248.