Exploiting dynamic timing margins in microprocessors for frequency-over-scaling with instruction-based clock adjustment
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter

Jeremy Constantin, Lai Wang, Georgios Karakonstantis, Anupam Chattopadhyay, Andreas Burg
Exploiting dynamic timing margins in microprocessors for frequency-over-scaling with instruction-based clock adjustment
DATE, 2015.

DATE 2015
DBLP
Scholar
Full names Links ISxN
@inproceedings{DATE-2015-ConstantinWKCB,
	acmid         = "2755839",
	author        = "Jeremy Constantin and Lai Wang and Georgios Karakonstantis and Anupam Chattopadhyay and Andreas Burg",
	booktitle     = "{Proceedings of the 19th Conference and Exhibition on Design, Automation and Test in Europe}",
	isbn          = "978-3-9815370-4-8",
	pages         = "381--386",
	publisher     = "{ACM}",
	title         = "{Exploiting dynamic timing margins in microprocessors for frequency-over-scaling with instruction-based clock adjustment}",
	year          = 2015,
}


Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.