Efficient Modular Testing of SOCs Using Dual-Speed TAM Architectures
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Anuja Sehgal, Krishnendu Chakrabarty
Efficient Modular Testing of SOCs Using Dual-Speed TAM Architectures
DATE, 2004.

DATE v1 2004
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@inproceedings{DATE-v1-2004-SehgalC,
	author        = "Anuja Sehgal and Krishnendu Chakrabarty",
	booktitle     = "{Proceedings of the Eighth Conference on Design, Automation and Test in Europe, Volume 1}",
	doi           = "10.1109/DATE.2004.1268883",
	isbn          = "0-7695-2085-5",
	pages         = "422--427",
	publisher     = "{IEEE Computer Society}",
	title         = "{Efficient Modular Testing of SOCs Using Dual-Speed TAM Architectures}",
	year          = 2004,
}

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