Hybrid Reduction Technique for Efficient Simulation of Linear/Nonlinear Mixed Circuits
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Takashi Mine, Hidemasa Kubota, Atsushi Kamo, Takayuki Watanabe, Hideki Asai
Hybrid Reduction Technique for Efficient Simulation of Linear/Nonlinear Mixed Circuits
DATE, 2004.

DATE v2 2004
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@inproceedings{DATE-v2-2004-MineKKWA,
	author        = "Takashi Mine and Hidemasa Kubota and Atsushi Kamo and Takayuki Watanabe and Hideki Asai",
	booktitle     = "{Proceedings of the Eighth Conference on Design, Automation and Test in Europe, Volume 2}",
	doi           = "10.1109/DATE.2004.1269079",
	isbn          = "0-7695-2085-5",
	pages         = "1327--1333",
	publisher     = "{IEEE Computer Society}",
	title         = "{Hybrid Reduction Technique for Efficient Simulation of Linear/Nonlinear Mixed Circuits}",
	year          = 2004,
}

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