Travelled to:1 × France
1 × USA
2 × Germany
Collaborated with:T.Watanabe Y.Tanji H.Kubota T.Mine A.Kamo
Talks about:circuit (3) analysi (2) simul (2) rlc (2) interconnect (1) transient (1) nonlinear (1) distribut (1) techniqu (1) multilay (1)
Person: Hideki Asai
DBLP: Asai:Hideki
Contributed to:
20102006
20042004Wrote 4 papers:
- DATE-2010-WatanabeA #modelling #multi #performance #simulation
- Equivalent circuit modeling of multilayered power/ground planes for fast transient simulation (TW, HA), pp. 1153–1158.
- DATE-2006-TanjiWKA #analysis #scalability #using
- Large scale RLC circuit analysis using RLCG-MNA formulation (YT, TW, HK, HA), pp. 45–46.
- DAC-2004-TanjiA #analysis #distributed
- Closed-form expressions of distributed RLC interconnects for analysis of on-chip inductance effects (YT, HA), pp. 810–813.
- DATE-v2-2004-MineKKWA #hybrid #linear #performance #reduction #simulation
- Hybrid Reduction Technique for Efficient Simulation of Linear/Nonlinear Mixed Circuits (TM, HK, AK, TW, HA), pp. 1327–1333.