Deterministic Clock Gating for Microprocessor Power Reduction
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter

Hai Li, Swarup Bhunia, Yiran Chen, T. N. Vijaykumar, Kaushik Roy
Deterministic Clock Gating for Microprocessor Power Reduction
HPCA, 2003.

HPCA 2003
DBLP
Scholar
DOI
Full names Links ISxN
@inproceedings{HPCA-2003-LiBCVR,
	author        = "Hai Li and Swarup Bhunia and Yiran Chen and T. N. Vijaykumar and Kaushik Roy",
	booktitle     = "{Proceedings of the Ninth International Symposium on High-Performance Computer Architecture}",
	doi           = "10.1109/HPCA.2003.1183529",
	isbn          = "0-7695-1871-0",
	pages         = "113--122",
	publisher     = "{IEEE Computer Society}",
	title         = "{Deterministic Clock Gating for Microprocessor Power Reduction}",
	year          = 2003,
}

Tags:



Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.