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Travelled to:
1 × Germany
Collaborated with:
C.Rousselle M.Pflanz T.Mohaupt H.T.Vierhaus
Talks about:
fault (2) transient (1) processor (1) transfer (1) regist (1) perman (1) simul (1) level (1) embed (1)

Person: A. Behling

DBLP DBLP: Behling:A=

Contributed to:

DATE 20012001

Wrote 1 papers:

DATE-2001-RoussellePBMV #embedded #fault
A register-transfer-level fault simulator for permanent and transient faults in embedded processors (CR, MP, AB, TM, HTV), p. 811.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.