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Travelled to:
1 × USA
Collaborated with:
L.Séméria R.Mehra B.M.Pangrle A.Seawright D.Ng
Talks about:
methodolog (1) processor (1) verifi (1) thread (1) design (1) multi (1) base (1) rtl (1)

Person: Arjuna Ekanayake

DBLP DBLP: Ekanayake:Arjuna

Contributed to:

DAC 20022002

Wrote 1 papers:

DAC-2002-SemeriaMPESN #concurrent #design #multi #thread #verification
RTL c-based methodology for designing and verifying a multi-threaded processor (LS, RM, BMP, AE, AS, DN), pp. 123–128.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.