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Travelled to:
1 × France
1 × USA
Collaborated with:
K.Sato G.D.Micheli R.Mehra B.M.Pangrle A.Ekanayake A.Seawright D.Ng
Talks about:
methodolog (1) processor (1) synthesi (1) behavior (1) resolut (1) pointer (1) verifi (1) thread (1) memori (1) design (1)

Person: Luc Séméria

DBLP DBLP: S=eacute=m=eacute=ria:Luc

Contributed to:

DAC 20022002
DATE 20002000

Wrote 2 papers:

DAC-2002-SemeriaMPESN #concurrent #design #multi #thread #verification
RTL c-based methodology for designing and verifying a multi-threaded processor (LS, RM, BMP, AE, AS, DN), pp. 123–128.
DATE-2000-SemeriaSM #behaviour #c #memory management #pointer #synthesis
Resolution of Dynamic Memory Allocation and Pointers for the Behavioral Synthesis from C (LS, KS, GDM), pp. 312–319.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.