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Travelled to:
1 × France
4 × USA
Collaborated with:
D.A.Lobo U.Prabhu A.Seawright V.K.Raj D.D.Gajski F.Brewer J.Biggs C.Clavel O.Domerego K.M.Just L.Séméria R.Mehra A.Ekanayake D.Ng
Talks about:
synthesi (3) design (2) microprocessor (1) superpipelin (1) methodolog (1) processor (1) techniqu (1) creation (1) schedul (1) control (1)

Person: Barry M. Pangrle

DBLP DBLP: Pangrle:Barry_M=

Contributed to:

DATE 20112011
DAC 20022002
DAC 19921992
DAC 19911991
DAC 19841984

Wrote 6 papers:

DATE-2011-PangrleBCDJ #design #power management #verification
Beyond UPF & CPF: Low-power design and verification (BMP, JB, CC, OD, KMJ), p. 252.
DAC-2002-SemeriaMPESN #concurrent #design #multi #thread #verification
RTL c-based methodology for designing and verifying a multi-threaded processor (LS, RM, BMP, AE, AS, DN), pp. 123–128.
DAC-1992-PrabhuP #synthesis
Superpipelined Control and Data Path Synthesis (UP, BMP), pp. 638–643.
DAC-1991-LoboP #optimisation #scheduling
Redundant Operator Creation: A Scheduling Optimization Technique (DAL, BMP), pp. 775–778.
DAC-1991-PangrleBLS #synthesis
Relevant Issues in High-Level Connectivity Synthesis (BMP, FB, DAL, AS), pp. 607–610.
DAC-1984-RajPG #synthesis
Microprocessor synthesis (VKR, BMP, DDG), pp. 676–678.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.