BibSLEIGH corpus
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Open Knowledge
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Travelled to:
1 × Ireland
2 × USA
Collaborated with:
J.Lee T.Oh H.Park S.A.Mahlke H.Cho H.Shin J.Kim C.Jang S.Kim K.Kim S.Han
Talks about:
architectur (2) memori (2) cycl (2) scratchpad (1) reconfigur (1) subsystem (1) schedul (1) system (1) recurr (1) modulo (1)

Person: Bernhard Egger

DBLP DBLP: Egger:Bernhard

Contributed to:

LCTES 20092009
LCTES 20082008
LCTES 20072007

Wrote 3 papers:

LCTES-2009-OhEPM #architecture #configuration management #scheduling
Recurrence cycle aware modulo scheduling for coarse-grained reconfigurable architectures (TO, BE, HP, SAM), pp. 21–30.
LCTES-2008-LeeKJKEKH #architecture #embedded #named #performance
FaCSim: a fast and cycle-accurate architecture simulator for embedded systems (JL, JK, CJ, SK, BE, KK, SH), pp. 89–100.
LCTES-2007-ChoELS #memory management
Dynamic data scratchpad memory management for a memory subsystem with an MMU (HC, BE, JL, HS), pp. 195–206.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.