BibSLEIGH — Scott_A

Travelled to:

1 × France
1 × India
1 × Turkey
1 × United Kingdom
2 × Ireland
30 × USA
4 × China

Collaborated with:

M.L.Chu M.Kudlur M.Mehrara K.Fan A.Hormati M.Samadi Y.Park D.S.Khudia D.A.Jamshidi T.Kelly Y.Wang S.Lafortune A.Ansari S.Feng S.Gupta H.Park N.Clark T.N.Mudge J.J.K.Park W.W.Hwu R.A.Ravindran G.S.Dasika H.Zhong S.A.Lieberman M.Smelyanskiy E.S.Davidson H.K.Cho M.S.Schlansker P.Hsu M.Woh J.Lee B.R.Rau W.Y.Chen J.W.Lee D.I.August Y.Choi A.Sethia G.Wright R.Johnson Daichi Fujiki R.Das S.Seo H.Liao T.Oh B.Egger J.Hao H.S.Lee N.J.Warter T.Moseley R.E.Hank D.Bruening J.Torrellas H.Kim N.P.Johnson M.S.Gordon Z.M.Mao X.Chen Y.Lin N.Chong S.Das D.M.Bull S.Yehia K.Flautner D.M.Gallagher J.C.Gyllenhaal Y.Zhang S.Ghosh J.Huang M.A.Laurenzano Parker Hill J.Mars L.Tang R.M.Rabbah A.Nazeem S.A.Reveliotis P.D.Nagarkar E.D.Marsman R.M.Senger R.B.Brown R.G.Dreslinski C.Chakrabarti D.Blaauw K.Constantinides S.Plaza J.A.Blome B.Zhang V.Bertacco T.M.Austin M.Orshansky

Talks about:

parallel (8) applic (8) dynam (8) use (8) data (7) architectur (6) processor (6) schedul (6) program (5) memori (5)

Person: Scott A. Mahlke

DBLP: Mahlke:Scott_A=

Contributed to:

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

1999

1994

1993

1992

2016

2017

2018

Wrote 50 papers:

ASPLOS-2015-ParkPM #collaboration #gpu #multi #named: Chimera: Collaborative Preemption for Multitasking on a Shared GPU (JJKP, YP, SAM), pp. 593–606.
HPCA-2015-SethiaJM #gpu #memory management #named: Mascar: Speeding up GPU warps by reducing memory pitstops (AS, DAJ, SAM), pp. 174–185.
ASPLOS-2014-SamadiJLM #approximate #named #parallel: Paraprox: pattern-based approximation for data parallel applications (MS, DAJ, JL, SAM), pp. 35–50.
CGO-2013-ChoKWLLM #concurrent #source code: Practical lock/unlock pairing for concurrent programs (HKC, TK, YW, SL, HL, SAM), p. 12.
CGO-2013-ChoMHBM #profiling: Instant profiling: Instrumentation sampling for profiling datacenter applications (HKC, TM, REH, DB, SAM), p. 10.
HPCA-2013-AnsariFGTM #lightweight #named: Illusionist: Transforming lightweight cores into aggressive cores on demand (AA, SF, SG, JT, SAM), pp. 436–447.
LCTES-2013-KhudiaM #control flow #low cost #using: Low cost control flow protection using abstract control signatures (DSK, SAM), pp. 3–12.
ASPLOS-2012-ParkSPCM #architecture #performance: SIMD defragmenter: efficient ILP realization on data-parallel architectures (YP, SS, HP, HKC, SAM), pp. 363–374.
CGO-2012-KimJLMA #automation #clustering: Automatic speculative DOALL for clusters (HK, NPJ, JWL, SAM, DIA), pp. 94–103.
CGO-2012-ZhangGHLMA #fault tolerance #runtime: Runtime asynchronous fault tolerance via speculation (YZ, SG, JH, JWL, SAM, DIA), pp. 145–154.
DAC-2012-SeoDWPCMBM #architecture #process: Process variation in near-threshold wide SIMD architectures (SS, RGD, MW, YP, CC, SAM, DB, TNM), pp. 980–987.
LCTES-2012-KhudiaWM #embedded #fault #performance #using: Efficient soft error protection for commodity embedded microprocessors using profile information (DSK, GW, SAM), pp. 99–108.
OSDI-2012-GordonJMMC #execution #migration #named: COMET: Code Offload by Migrating Execution Transparently (MSG, DAJ, SAM, ZMM, XC), pp. 93–106.
PLDI-2012-SamadiHMLM #adaptation #compilation: Adaptive input-aware compilation for graphics engines (MS, AH, MM, JL, SAM), pp. 13–22.
ASPLOS-2011-HormatiSWMM #named #programming: Sponge: portable stream programming on graphics engines (AH, MS, MW, TNM, SAM), pp. 381–392.
CGO-2011-MehraraM #execution #web: Dynamically accelerating client-side web applications through decoupled execution (MM, SAM), pp. 74–84.
HPCA-2011-AnsariFGM #design #named #polymorphism #robust: Archipelago: A polymorphic cache design for enabling robust near-threshold operation (AA, SF, SG, SAM), pp. 539–550.
HPCA-2011-MehraraHSM #javascript #parallel #using: Dynamic parallelization of JavaScript applications using an ultra-lightweight speculation mechanism (MM, PCH, MS, SAM), pp. 87–98.
ASPLOS-2010-FengGAM #fault #named #probability #reliability #string: Shoestring: probabilistic soft error reliability on the cheap (SF, SG, AA, SAM), pp. 385–396.
ASPLOS-2010-HormatiCWKRMM #named #streaming: MacroSS: macro-SIMDization of streaming applications (AH, YC, MW, MK, RMR, TNM, SAM), pp. 285–296.
CASE-2009-WangLNRKML #concurrent #parallel #source code #thread: Maximally permissive deadlock avoidance for multithreaded computer programs (YW, HL, AN, SAR, TK, SAM, SL), pp. 37–41.
CGO-2009-ChoiLCMM #compilation #embedded #manycore #realtime: Stream Compilation for Real-Time Embedded Multicore Systems (YC, YL, NC, SAM, TNM), pp. 210–220.
HPCA-2009-FanKDM #programmable: Bridging the computation gap between programmable processors and hardwired accelerators (KF, MK, GSD, SAM), pp. 313–322.
LCTES-2009-OhEPM #architecture #configuration management #scheduling: Recurrence cycle aware modulo scheduling for coarse-grained reconfigurable architectures (TO, BE, HP, SAM), pp. 21–30.
PLDI-2009-MehraraHHM #hardware #low cost #memory management #transaction #using: Parallelizing sequential applications on commodity hardware using a low-cost software transactional memory (MM, JH, PCH, SAM), pp. 166–176.
POPL-2009-WangLKKM #concurrent #formal method: The theory of deadlock avoidance via discrete control (YW, SL, TK, MK, SAM), pp. 252–263.
CGO-2008-FanPKM #hardware #reuse #scheduling #usability: Modulo scheduling for highly customized datapaths to increase hardware reusability (KF, HP, MK, SAM), pp. 124–133.
DAC-2008-DasikaDFMB #using: DVFS in loop accelerators using BLADES (GSD, SD, KF, SAM, DMB), pp. 894–897.
HPCA-2008-ZhongMLM #parallel: Uncovering hidden loop level parallelism in sequential applications (HZ, MM, SAL, SAM), pp. 290–301.
OSDI-2008-WangKKLM #concurrent #named #parallel #source code #thread: Gadara: Dynamic Deadlock Avoidance for Multithreaded Programs (YW, TK, MK, SL, SAM), pp. 281–294.
PLDI-2008-KudlurM #execution #manycore #platform #source code: Orchestrating the execution of stream programs on multicore platforms (MK, SAM), pp. 114–124.
CGO-2007-HormatiCM: Exploiting Narrow Accelerators with Data-Centric Subgraph Mapping (AH, NC, SAM), pp. 341–353.
HPCA-2007-ClarkHYMF #hardware #lightweight #using: Liquid SIMD: Abstracting SIMD Hardware using Lightweight Dynamic Mapping (NC, AH, SY, SAM, KF), pp. 216–227.
HPCA-2007-ZhongLM #architecture #hybrid #manycore #parallel #thread: Extending Multicore Architectures to Exploit Hybrid Parallelism in Single-thread Applications (HZ, SAL, SAM), pp. 25–36.
LCTES-2007-ChuM #clustering #parallel: Code and data partitioning for fine-grain parallelism (MLC, SAM), pp. 161–164.
LCTES-2007-RavindranCM #power management: Compiler-managed partitioned data caches for low power (RAR, MLC, SAM), pp. 237–247.
CGO-2006-ChuM #clustering #multi: Compiler-directed Data Partitioning for Multicluster Processors (MLC, SAM), pp. 208–220.
HPCA-2006-ConstantinidesPBZBMAO #architecture #named: BulletProof: a defect-tolerant CMP switch architecture (KC, SP, JAB, BZ, VB, SAM, TMA, MO), pp. 5–16.
CGO-2005-RavindranNDMSMB #compilation #power management: Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache (RAR, PDN, GSD, EDM, RMS, SAM, RBB), pp. 179–190.
CGO-2004-KudlurFCRCM #heuristic #named #scheduling: FLASH: Foresighted Latency-Aware Scheduling Heuristic for Processors with Customized Datapaths (MK, KF, MLC, RAR, NC, SAM), pp. 201–212.
CGO-2004-SmelyanskiyMD #probability #scheduling: Probabilistic Predicate-Aware Modulo Scheduling (MS, SAM, ESD), pp. 151–162.
CGO-2003-SmelyanskiyMDL #constraints #scheduling: Predicate-Aware Scheduling: A Technique for Reducing Resource Constraints (MS, SAM, ESD, HHSL), pp. 169–178.
PLDI-2003-ChuFM #clustering #multi: Region-based hierarchical operation partitioning for multicluster processors (MLC, KF, SAM), pp. 300–311.
PLDI-1999-SchlanskerMJ #architecture #branch #optimisation #reduction: Control CPR: A Branch Height Reduction Optimization for EPIC Architectures (MSS, SAM, RJ), pp. 155–168.
ASPLOS-1994-GallagherCMGH #ambiguity #memory management #using: Dynamic Memory Disambiguation Using the Memory Conflict Buffer (DMG, WYC, SAM, JCG, WmWH), pp. 183–193.
PLDI-1993-WarterMHR: Reverse If-Conversion (NJW, SAM, WmWH, BRR), pp. 290–299.
ASPLOS-1992-MahlkeCHRS #scheduling: Sentinel Scheduling for VLIW and Superscalar Processors (SAM, WYC, WmWH, BRR, MSS), pp. 238–247.
PLDI-2016-LaurenzanoHSMMT #approximate #latency #using: Input responsiveness: using canary inputs to dynamically steer approximation (MAL, PH, MS, SAM, JM, LT), pp. 161–176.
ASPLOS-2017-ParkPM #multi #performance #resource management: Dynamic Resource Management for Efficient Utilization of Multitasking GPUs (JJKP, YP, SAM), pp. 527–540.
ASPLOS-2018-FujikiMD #in memory #parallel: In-Memory Data Parallel Processor (DF, SAM, RD), pp. 1–14.