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Travelled to:
1 × France
1 × USA
Collaborated with:
T.Larrabee
Talks about:
fault (2) bridg (2) cmos (2) strategi (1) pattern (1) generat (1) circuit (1) integr (1) simul (1) test (1)

Person: Brian Chess

DBLP DBLP: Chess:Brian

Contributed to:

EDAC-ETC-EUROASIC 19941994
DAC 19931993

Wrote 2 papers:

EDAC-1994-ChessL #fault #generative
Generating Test Patterns for Bridge Faults in CMOS ICs (BC, TL), pp. 165–170.
DAC-1993-ChessL #fault #simulation
Bridge Fault simulation strategies for CMOS integrated Circuits (BC, TL), pp. 458–462.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.