BibSLEIGH corpus
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Open Knowledge
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Travelled to:
1 × Germany
Collaborated with:
B.D.d.Dinechin M.Poulhiès G.Lager L.Domagala F.Rastello P.Sadayappan
Talks about:
processor (1) parallel (1) instruct (1) schedul (1) regist (1) promot (1) massiv (1) critic (1) comput (1) combin (1)

Person: Duco van Amstel

DBLP DBLP: Amstel:Duco_van

Contributed to:

DATE 20142014
CC 20162016

Wrote 2 papers:

DATE-2014-DinechinAPL #parallel
Time-critical computing on a single-chip massively parallel processor (BDdD, DvA, MP, GL), pp. 1–6.
CC-2016-DomagalaARS #scheduling
Register allocation and promotion through combined instruction scheduling and loop unrolling (LD, DvA, FR, PS), pp. 143–151.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.