BibSLEIGH corpus
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Open Knowledge
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Travelled to:
1 × Canada
2 × Germany
Collaborated with:
A.Shrivastava N.D.Dutt A.Nicolau S.Park Y.Paek A.Nicolau N.Dutt
Talks about:
explor (3) bypass (3) processor (2) embed (2) framework (1) instruct (1) schedul (1) partial (1) generat (1) automat (1)

Person: Eugene Earlie

DBLP DBLP: Earlie:Eugene

Contributed to:

DATE 20062006
LCTES 20062006
DATE 20052005

Wrote 3 papers:

DATE-2006-ParkESNDP #automation #embedded #generative #performance
Automatic generation of operation tables for fast exploration of bypasses in embedded processors (SP, EE, AS, AN, ND, YP), pp. 1197–1202.
LCTES-2006-ParkSDNPE #reduction #scheduling
Bypass aware instruction scheduling for register file power reduction (SP, AS, NDD, AN, YP, EE), pp. 173–181.
DATE-2005-ShrivastavaDNE #embedded #framework #named
PBExplore: A Framework for Compiler-in-the-Loop Exploration of Partial Bypassing in Embedded Processors (AS, NDD, AN, EE), pp. 1264–1269.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.