Travelled to:
1 × France
2 × Germany
Collaborated with:
A.J.v.d.Goor Y.Lu T.Marconi K.Bertels L.Carro S.Hamdioui A.Vitkovski G.Kuzmanov A.C.S.Beck M.B.Rutzig V.N.Yarmolik V.G.Mikitjuk G.Nazarian D.G.Rodrigues Á.F.Moreira
Talks about:
memori (3) reconfigur (2) algorithm (2) test (2) microcontrol (1) placement (1) heterogen (1) transpar (1) parallel (1) intellig (1)
Person: Georgi Gaydadjiev
DBLP: Gaydadjiev:Georgi
Contributed to:
Wrote 7 papers:
- PDP-2015-NazarianRMCG #control flow #detection #fault
- Bit-Flip Aware Control-Flow Error Detection (GN, DGR, ÁFM, LC, GG), pp. 215–221.
- DATE-2010-GoorGH #memory management #testing
- Memory testing with a RISC microcontroller (AJvdG, GG, SH), pp. 214–219.
- DATE-2008-BeckRGC #configuration management #embedded
- Transparent Reconfigurable Acceleration for Heterogeneous Embedded Applications (ACSB, MBR, GG, LC), pp. 1208–1213.
- DATE-2008-LuMGB #algorithm #for free #performance
- An efficient algorithm for free resources management on the FPGA (YL, TM, GG, KB), pp. 1095–1098.
- DATE-2008-MarconiLBG #algorithm #configuration management #online
- Intelligent Merging Online Task Placement Algorithm for Partial Reconfigurable Systems (TM, YL, KB, GG), pp. 1346–1351.
- DATE-2008-VitkovskiKG #memory management #parallel
- Memory Organization with Multi-Pattern Parallel Accesses (AV, GK, GG), pp. 1420–1425.
- EDTC-1997-GoorGYM #fault #memory management
- March LA: a test for linked memory faults (AJvdG, GG, VNY, VGM), p. 627.