Travelled to:
1 × Denmark
1 × France
1 × USA
Collaborated with:
S.Yajima H.Tsutsui T.Sato N.Ishiura T.Imagawa H.Hiraishi K.Hamaguchi Z.E.Rákossy M.Hiromoto Y.Nakamura
Talks about:
architectur (2) function (2) vector (2) reconfigur (1) heterogen (1) sequenti (1) process (1) manipul (1) breadth (1) boolean (1)
Person: Hiroyuki Ochi
DBLP: Ochi:Hiroyuki
Contributed to:
Wrote 4 papers:
- DATE-2013-ImagawaTOS #analysis #architecture #configuration management #effectiveness
- A cost-effective selective TMR for heterogeneous coarse-grained reconfigurable architectures based on DFG-level vulnerability analysis (TI, HT, HO, TS), pp. 701–706.
- DATE-2013-RakossyHTSNO #architecture #array #fault #functional #testing
- Hot-swapping architecture with back-biased testing for mitigation of permanent faults in functional unit array (ZER, MH, HT, TS, YN, HO), pp. 535–540.
- CAV-1991-HiraishiHOY #logic #model checking #verification
- Vectorized Symbolic Model Checking of Computation Tree Logic for Sequential Machine Verification (HH, KH, HO, SY), pp. 214–224.
- DAC-1991-OchiIY
- Breadth-First Manipulation of SBDD of Boolean Functions for Vector Processing (HO, NI, SY), pp. 413–416.