Travelled to:1 × USA
Collaborated with:∅ J.Burns G.Carpenter E.Kursun R.Puri M.Scheuermann
Talks about:technolog (2) challeng (2) design (2) processor (1) perspect (1) circuit (1) futur (1) node (1) cad (1)
Person: James D. Warnock
DBLP: Warnock:James_D=
Contributed to:
2011Wrote 2 papers:
- DAC-2011-BurnsCKPWS #3d #challenge #design
- Design, CAD and technology challenges for future processors: 3D perspectives (JB, GC, EK, RP, JDW, MS), p. 212.
- DAC-2011-Warnock #challenge #design
- Circuit design challenges at the 14nm technology node (JDW), pp. 464–467.