Travelled to:1 × Germany
1 × Ireland
1 × Korea
3 × USA
Collaborated with:J.W.Davidson D.B.Whalley B.R.Childers D.L.Jones R.W.Moore J.Baiocchi D.W.Williams W.Hu J.Mars P.A.Kulkarni S.Hines W.Zhao B.Cai M.W.Bailey R.v.Engelen X.Yuan K.Gallivan
Talks about:system (3) memori (2) fast (2) architectur (1) algorithm (1) translat (1) retarget (1) interact (1) indirect (1) configur (1)
Person: Jason Hiser
DBLP: Hiser:Jason
Contributed to:
2009
2007
20072004
20042002Wrote 6 papers:
- LCTES-2009-MooreBCDH #architecture #challenge
- Addressing the challenges of DBT for the ARM architecture (RWM, JB, BRC, JWD, JH), pp. 147–156.
- CGO-2007-HiserWHDMC #branch
- Evaluating Indirect Branch Handling Mechanisms in Software Dynamic Translation Systems (JH, DWW, WH, JWD, JM, BRC), pp. 61–73.
- SAC-2007-HiserDW #design #embedded #memory management #performance
- Fast, accurate design space exploration of embedded systems memory configurations (JH, JWD, DBW), pp. 699–706.
- LCTES-2004-HiserD #algorithm #compilation #memory management #named #performance
- EMBARC: an efficient memory bank assignment algorithm for retargetable compilers (JH, JWD), pp. 182–191.
- PLDI-2004-KulkarniHHWDJ #effectiveness #optimisation #performance #sequence
- Fast searches for effective optimization phase sequences (PAK, SH, JH, DBW, JWD, DLJ), pp. 171–182.
- LCTES-SCOPES-2002-ZhaoCWBEYHDGJ #interactive #named
- VISTA: a system for interactive code improvement (WZ, BC, DBW, MWB, RvE, XY, JH, JWD, KG, DLJ), pp. 155–164.