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Travelled to:
1 × France
Collaborated with:
H.Ren R.Puri L.N.Reddy S.Krishnaswamy C.Washburn J.Keinert
Talks about:
synthesi (1) perform (1) circuit (1) intuit (1) high (1) eco (1)

Person: Joel Earl

DBLP DBLP: Earl:Joel

Contributed to:

DATE 20132013

Wrote 1 papers:

DATE-2013-RenPRKWEK #performance #synthesis
Intuitive ECO synthesis for high performance circuits (HR, RP, LNR, SK, CW, JE, JK), pp. 1002–1007.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.