Travelled to:
1 × France
1 × Germany
5 × USA
Collaborated with:
I.L.Markov J.P.Hayes B.Bodenmiller D.Pe'er T.Welp A.Kuehlmann G.F.Viamontes H.Ren R.Puri L.N.Reddy C.Washburn J.Earl J.Keinert D.Densmore M.Horowitz X.Shen A.Arkin E.Winfree C.Voigt
Talks about:
circuit (3) synthesi (2) reliabl (2) design (2) probabilist (1) transfer (1) testabl (1) special (1) session (1) perform (1)
Person: Smita Krishnaswamy
DBLP: Krishnaswamy:Smita
Contributed to:
Wrote 7 papers:
- DAC-2013-KrishnaswamyBP #question
- Can CAD cure cancer? (SK, BB, DP), p. 2.
- DATE-2013-RenPRKWEK #performance #synthesis
- Intuitive ECO synthesis for high performance circuits (HR, RP, LNR, SK, CW, JE, JK), pp. 1002–1007.
- DAC-2012-WelpKK #optimisation
- Generalized SAT-sweeping for post-mapping optimization (TW, SK, AK), pp. 814–819.
- DAC-2011-DensmoreHKSAWV #biology #design #synthesis
- Joint DAC/IWBDA special session design and synthesis of biological circuits (DD, MH, SK, XS, AA, EW, CV), pp. 114–115.
- DAC-2009-KrishnaswamyMH #testing
- Improving testability and soft-error resilience through retiming (SK, ILM, JPH), pp. 508–513.
- DAC-2008-KrishnaswamyMH #design #logic #on the #reliability
- On the role of timing masking in reliable logic circuit design (SK, ILM, JPH), pp. 924–929.
- DATE-2005-KrishnaswamyVMH #evaluation #matrix #probability #reliability
- Accurate Reliability Evaluation and Enhancement via Probabilistic Transfer Matrices (SK, GFV, ILM, JPH), pp. 282–287.