Travelled to:2 × USA
Collaborated with:S.Hauck A.Sharma
Talks about:placement (2) fpga (2) architectur (1) pipelin (1) netlist (1) window (1) enhanc (1) driven (1) anneal (1) simul (1)
Person: Kenneth Eguro
DBLP: Eguro:Kenneth
Contributed to:
20082005Wrote 2 papers:
- DAC-2008-EguroH #pipes and filters
- Enhancing timing-driven FPGA placement for pipelined netlists (KE, SH), pp. 34–37.
- DAC-2005-EguroHS #adaptation #architecture
- Architecture-adaptive range limit windowing for simulated annealing FPGA placement (KE, SH, AS), pp. 439–444.