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Travelled to:
1 × China
1 × USA
Collaborated with:
L.Chen R.Wang T.M.Pinkston W.Choi J.T.Draper
Talks about:
network (2) transact (1) traffic (1) perform (1) penalti (1) memori (1) regul (1) power (1) minim (1) gate (1)

Person: Lihang Zhao

DBLP DBLP: Zhao:Lihang

Contributed to:

HPCA 20142014
HPCA 20132013

Wrote 2 papers:

HPCA-2014-ChenZWP #named #performance
MP3: Minimizing performance penalty for power-gating of Clos network-on-chip (LC, LZ, RW, TMP), pp. 296–307.
HPCA-2013-ZhaoCCD #memory management #transaction
In-network traffic regulation for Transactional Memory (LZ, WC, LC, JTD), pp. 520–531.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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