Proceedings of the 20th International Symposium on High-Performance Computer Architecture
HPCA, 2014.

@proceedings{HPCA-2014,
	address       = "Orlando, Florida, USA",
	ee            = "http://www.computer.org/csdl/proceedings/hpca/2014/3097/00/index.html",
	isbn          = "978-1-4799-3097-5",
	publisher     = "{IEEE Computer Society}",
	title         = "{Proceedings of the 20th International Symposium on High-Performance Computer Architecture}",
	year          = 2014,
}

Contents (58 items)

21 ×#named
12 ×#memory management
8 ×#architecture
7 ×#performance
5 ×#clustering
4 ×#concurrent
4 ×#energy
4 ×#gpu
4 ×#thread
3 ×#consistency

HPCA-2014-KurianDK #replication

Locality-aware data replication in the Last-Level Cache (GK, SD, OK), pp. 1–12.

HPCA-2014-WangJXSX #adaptation #hybrid #migration #policy

Adaptive placement and migration policy for an STT-RAM-based hybrid cache (ZW, DAJ, CX, GS, YX), pp. 13–24.

HPCA-2014-AhnYC #architecture #named #predict

DASCA: Dead Write Prediction Assisted STT-RAM Cache Architecture (JA, SY, KC), pp. 25–36.

HPCA-2014-NugterenBCB #distance #gpu #modelling #reuse

A detailed GPU cache model based on reuse distance theory (CN, GJvdB, HC, HEB), pp. 37–48.

HPCA-2014-PalframanKL #fault

Precision-aware soft error protection for GPUs (DJP, NSK, MHL), pp. 49–59.

HPCA-2014-BalasubramanianS #comprehension #execution #physics #reliability

Understanding the impact of gate-level physical reliability effects on whole program execution (RB, KS), pp. 60–71.

HPCA-2014-KarpuzcuAK #named #towards

Accordion: Toward soft Near-Threshold Voltage Computing (URK, IA, NSK), pp. 72–83.

HPCA-2014-AgrawalAT #energy #locality #named #process

Mosaic: Exploiting the spatial locality of process variation to reduce refresh energy in on-chip eDRAM modules (AA, AA, JT), pp. 84–95.

HPCA-2014-HuangHFS #concurrent #data transformation #detection #metadata #runtime

Low-overhead and high coverage run-time race detection through selective meta-data management (RCH, EH, AF, GES), pp. 96–107.

HPCA-2014-FytrakiVKFG #monitoring #named #programmable

FADE: A programmable filtering accelerator for instruction-grain monitoring (SF, EV, YOK, BF, BG), pp. 108–119.

HPCA-2014-QiMAT #detection

Dynamically detecting and tolerating IF-Condition Data Races (SQ, AM, WA, JT), pp. 120–131.

HPCA-2014-ZhengMW #energy

Exploiting thermal energy storage to reduce data center capital and operating expenses (WZ, KM, XW), pp. 132–141.

HPCA-2014-0001A #clustering #energy

Implications of high energy proportional servers on cluster-wide energy proportionality (DW, MA), pp. 142–153.

HPCA-2014-GuevaraLL #design

Strategies for anticipating risk in heterogeneous system design (MG, BL, BCL), pp. 154–164.

HPCA-2014-ElverN #consistency #named

TSO-CC: Consistency directed cache coherence for TSO (ME, VN), pp. 165–176.

HPCA-2014-DemetriadesC #manycore #scalability

Stash directory: A scalable directory for many-core coherence (SD, SC), pp. 177–188.

HPCA-2014-HechtmanCHTBHRW #approach #consistency #named

QuickRelease: A throughput-oriented approach to release consistency on GPUs (BAH, SC, DRH, YT, BMB, MDH, SKR, DAW), pp. 189–200.

HPCA-2014-ElwellRAP #architecture #memory management

A Non-Inclusive Memory Permissions architecture for protection against cross-layer attacks (JE, RR, NBAG, DP), pp. 201–212.

HPCA-2014-FletcherRYDKD #information management #performance #ram #trade-off

Suppressing the Oblivious RAM timing channel while making information leakage and program efficiency trade-offs (CWF, LR, XY, MvD, OK, SD), pp. 213–224.

HPCA-2014-WangFS #memory management

Timing channel protection for a shared memory controller (YW, AF, GES), pp. 225–236.

HPCA-2014-AwadS #behaviour #memory management #named

STM: Cloning the spatial and temporal memory access behavior (AA, YS), pp. 237–247.

HPCA-2014-ElTantawyMOA #architecture #control flow #gpu #multi #performance #scalability

A scalable multi-path microarchitecture for efficient GPU control flow (AE, JWM, MO, TMA), pp. 248–259.

HPCA-2014-LeeSMKSCR #concurrent #resource management #scheduling #thread

Improving GPGPU resource utilization through alternative thread block scheduling (ML, SS, JM, JK, WS, YGC, SR), pp. 260–271.

HPCA-2014-JiaSM #memory management #named #parallel

MRPB: Memory request prioritization for massively parallel processors (WJ, KAS, MM), pp. 272–283.

HPCA-2014-XiangYZ

Warp-level divergence in GPUs: Characterization, impact, and mitigation (PX, YY, HZ), pp. 284–295.

HPCA-2014-ChenZWP #named #performance

MP3: Minimizing performance penalty for power-gating of Clos network-on-chip (LC, LZ, RW, TMP), pp. 296–307.

HPCA-2014-WonCGHS #learning #network #online #power management

Up by their bootstraps: Online learning in Artificial Neural Networks for CMP uncore power management (JYW, XC, PG, JH, VS), pp. 308–319.

HPCA-2014-DiTomasoKL #architecture #fault tolerance #named #power management

QORE: A fault tolerant network-on-chip architecture with power-efficient quad-function channel (QFC) buffers (DD, AKK, AL), pp. 320–331.

HPCA-2014-KimKMYK

Transportation-network-inspired network-on-chip (HK, GK, SM, HY, JK), pp. 332–343.

HPCA-2014-XieTHC #clustering #memory management #throughput

Improving system throughput and fairness simultaneously in shared memory CMP systems via Dynamic Bank Partitioning (MX, DT, KH, XC), pp. 344–355.

HPCA-2014-ChangLCAWKM #performance

Improving DRAM performance by parallelizing refreshes with accesses (KKWC, DL, ZC, ARA, CW, YK, OM), pp. 356–367.

HPCA-2014-ZhangPXSX #architecture #memory management #named

CREAM: A Concurrent-Refresh-Aware DRAM Memory architecture (TZ, MP, CX, GS, YX), pp. 368–379.

HPCA-2014-WangDDS #concurrent #memory management #multi #named #predict #source code #thread

DraMon: Predicting memory bandwidth usage of multi-threaded programs with high accuracy and low overhead (WW, TD, JWD, MLS), pp. 380–391.

HPCA-2014-ZhangBES #design #named #protocol #scalability #verification

PVCoherence: Designing flat coherence protocols for scalable verification (MZ, JDB, JE, DJS), pp. 392–403.

HPCA-2014-GopeL

Atomic SC for simple in-order processors (DG, MHL), pp. 404–415.

HPCA-2014-LiuXGZC #concurrent #consistency #hardware #memory management #transaction #virtual machine

Concurrent and consistent virtual machine introspection with hardware transactional memory (YL, YX, HG, BZ, HC), pp. 416–427.

HPCA-2014-PeraisS

Practical data value speculation for future high-end processors (AP, AS), pp. 428–439.

HPCA-2014-AnsariMXT #energy #named #network

Tangle: Route-oriented dynamic voltage minimization for variation-afflicted, energy-efficient on-chip networks (AA, AKM, JX, JT), pp. 440–451.

HPCA-2014-KhanAWMJ #clustering #performance #using

Improving cache performance using read-write partitioning (SMK, ARA, CW, OM, DAJ), pp. 452–463.

HPCA-2014-ShinYCK #memory management #named

NUAT: A non-uniform access time memory controller (WS, JY, JC, LSK), pp. 464–475.

HPCA-2014-KarnagelDRLLSL #database #in memory #performance #transaction

Improving in-memory database index performance with Intel® Transactional Synchronization Extensions (TK, RD, RR, KL, TL, BS, WL), pp. 476–487.

HPCA-2014-WangZLZYHGJSZZLZLQ #benchmark #big data #internet #metric #named

BigDataBench: A big data benchmark suite from internet services (LW, JZ, CL, YZ, QY, YH, WG, ZJ, YS, SZ, CZ, GL, KZ, XL, BQ), pp. 488–499.

HPCA-2014-EmmaBHKPYHBM #3d

3D stacking of high-performance processors (PGE, AB, MBH, KK, VP, RY, AH, PB, JHM), pp. 500–511.

HPCA-2014-KannanGS #cost analysis #persistent

Reducing the cost of persistence for nonvolatile heaps in end user devices (SK, AG, KS), pp. 512–523.

HPCA-2014-JungK #named #resource management

Sprinkler: Maximizing resource utilization in many-chip solid state disks (MJ, MTK), pp. 524–535.

HPCA-2014-ZhaoVZLZ0 #memory management #specification

Over-clocked SSD: Safely running beyond flash memory chip I/O clock specs (KZ, KSV, XZ, JL, NZ, TZ), pp. 536–545.

HPCA-2014-KimLJK #architecture #gpu #memory management #named #using

GPUdmm: A high-performance and memory-oblivious GPU architecture using dynamic memory management (YK, JL, JEJ, JK), pp. 546–557.

HPCA-2014-PhamBEL #clustering

Increasing TLB reach by exploiting clustering in page translations (BP, AB, YE, GHL), pp. 558–567.

HPCA-2014-PowerHW #gpu

Supporting x86-64 address translation for 100s of GPU lanes (JP, MDH, DAW), pp. 568–578.

HPCA-2014-MatthewsZS #power management

Scalably verifiable dynamic power management (OM, MZ, DJS), pp. 579–590.

HPCA-2014-HayengaNL #architecture #execution #named #performance

Revolver: Processor architecture for power efficient loop execution (MH, VRKN, MHL), pp. 591–602.

HPCA-2014-LoK #manycore

Dynamic management of TurboMode in modern multi-core chips (DL, CK), pp. 603–613.

HPCA-2014-LakshminarayanaK #algorithm #graph

Spare register aware prefetching for graph algorithms on GPUs (NBL, HK), pp. 614–625.

HPCA-2014-PugsleyCWCSJLCB #evaluation #runtime

Sandbox Prefetching: Safe run-time evaluation of aggressive prefetchers (SHP, ZC, CW, PfC, RLS, AJ, SLL, KC, RB), pp. 626–637.

HPCA-2014-ShafieeTBD #memory management #named

MemZip: Exploring unconventional benefits from memory compression (AS, MT, RB, AD), pp. 638–649.

HPCA-2014-TsengT #named #thread

CDTT: Compiler-generated data-triggered threads (HWT, DMT), pp. 650–661.

HPCA-2014-PariharH #approach #dependence #metaheuristic

Accelerating decoupled look-ahead via weak dependence removal: A metaheuristic approach (RP, MCH), pp. 662–677.

HPCA-2014-HeirmanCCHJE #architecture #clustering #thread

Undersubscribed threading on clustered cache architectures (WH, TEC, KVC, IH, AJ, LE), pp. 678–689.