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Travelled to:
3 × Germany
Collaborated with:
M.Coppola M.Caldari M.Conti C.Turchetti F.Dumitrascu I.Bacivarov M.Bonaciu A.A.Jerraya S.Curaba P.Crippa S.Orcioni A.Deledda C.Mucci A.Vitkovski P.Bonnot A.Grasset P.Millet M.Kühnle F.Ries M.Hübner J.Becker R.Locatelli G.Maruccia F.Campi T.DeMarco
Talks about:
system (3) level (2) amba (2) bus (2) infrastructur (1) interconnect (1) architectur (1) reconfigur (1) methodolog (1) processor (1)

Person: Lorenzo Pieralisi

DBLP DBLP: Pieralisi:Lorenzo

Contributed to:

DATE 20082008
DATE Designers’ Forum 20062006
DATE 20032003

Wrote 4 papers:

DATE-2008-DeleddaMVBGMKRHBCPLMCD #communication #configuration management #design #framework
Design of a HW/SW Communication Infrastructure for a Heterogeneous Reconfigurable Processor (AD, CM, AV, PB, AG, PM, MK, FR, MH, JB, MC, LP, RL, GM, FC, TD), pp. 1352–1357.
DATE-DF-2006-DumitrascuBPBJ #flexibility #framework #performance #platform
Flexible MPSoC platform with fast interconnect exploration for optimal system performance for a specific application (FD, IB, LP, MB, AAJ), pp. 166–171.
DATE-2003-CaldariCCCOPT #analysis
System-Level Power Analysis Methodology Applied to the AMBA AHB Bus (MC, MC, MC, PC, SO, LP, CT), pp. 20032–20039.
DATE-2003-CaldariCCCPT #architecture #modelling #transaction #using
Transaction-Level Models for AMBA Bus Architecture Using SystemC 2.0 (MC, MC, MC, SC, LP, CT), pp. 20026–20031.

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