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Travelled to:
1 × Germany
Collaborated with:
F.Chang P.Feldmann R.Chadha N.Ns F.Cano
Talks about:
submicron (1) parasit (1) effect (1) design (1) verif (1) level (1) digit (1) coupl (1) deep (1) chip (1)

Person: Lun Ye

DBLP DBLP: Ye:Lun

Contributed to:

DATE 19991999

Wrote 1 papers:

DATE-1999-YeCFCNC #design #verification
Chip-Level Verification for Parasitic Coupling Effects in Deep-Submicron Digital Designs (LY, FCC, PF, RC, NN, FC), pp. 658–663.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.