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Travelled to:
1 × Canada
1 × Germany
1 × Italy
Collaborated with:
Tobias Graf K.Danne H.Walder B.Rinner R.Weiß M.Wistuba Lars Schaefers M.Jakobs H.Wehrheim T.Wiersema
Talks about:
comput (3) reconfigur (2) schedul (2) hardwar (2) simul (2) devic (2) carlo (2) mont (2) go (2) architectur (1)

Person: Marco Platzner

DBLP DBLP: Platzner:Marco

Contributed to:

IFM 20142014
LCTES 20062006
DATE 20032003
PDP 19951995
CIG 20122012
CIG 20142014
CIG 20162016

Wrote 7 papers:

IFM-2014-JakobsPWW #hardware #verification
Integrating Software and Hardware Verification (MCJ, MP, HW, TW), pp. 307–322.
LCTES-2006-DanneP #configuration management #hardware #scheduling
An EDF schedulability test for periodic tasks on reconfigurable hardware devices (KD, MP), pp. 93–102.
DATE-2003-WalderP #configuration management #online #scheduling
Online Scheduling for Block-Partitioned Reconfigurable Devices (HW, MP), pp. 10290–10295.
PDP-1995-PlatznerRW #architecture #distributed #multi #simulation
A distributed computer architecture for qualitative simulation based on a multi-DSP and FPGAs (MP, BR, RW), pp. 311–318.
CIG-2012-WistubaSP #comparison #predict
Comparison of Bayesian move prediction systems for Computer Go (MW, LS, MP), pp. 91–99.
CIG-2014-GrafP #graph #monte carlo
Common fate graph patterns in Monte Carlo Tree Search for computer go (TG, MP), pp. 1–8.
CIG-2016-GrafP #monte carlo #revisited #simulation
Monte-Carlo simulation balancing revisited (TG, MP), pp. 1–7.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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