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Travelled to:
1 × Germany
1 × USA
Collaborated with:
M.Horowitz J.Kim F.Lau S.Liao B.Lim J.Mao
Talks about:
analog (2) homotopi (1) leverag (1) fortifi (1) equival (1) coverag (1) circuit (1) analysi (1) intent (1) optim (1)

Person: Metha Jeeradit

DBLP DBLP: Jeeradit:Metha

Contributed to:

DAC 20102010
DATE 20102010

Wrote 2 papers:

DAC-2010-HorowitzJLLLM #analysis #equivalence #modelling
Fortifying analog models with equivalence checking and coverage analysis (MH, MJ, FL, SL, BL, JM), pp. 425–430.
DATE-2010-JeeraditKH #optimisation
Intent-leveraged optimization of analog circuits via homotopy (MJ, JK, MH), pp. 1614–1619.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.