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Travelled to:
2 × USA
Collaborated with:
J.Dussault C.Liaw C.Tseng R.Wei S.G.Rothweiler A.K.Bose
Talks about:
synthesi (2) versatil (1) behavior (1) system (1) design (1) level (1) bridg (1) tool (1) high (1) chip (1)

Person: Michael M. Tong

DBLP DBLP: Tong:Michael_M=

Contributed to:

DAC 19881988
DAC 19841984

Wrote 2 papers:

DAC-1988-TsengWRTB #behaviour #named #synthesis
Bridge: A Versatile Behavioral Synthesis System (CJT, RSW, SGR, MMT, AKB), pp. 415–420.
DAC-1984-DussaultLT #design #synthesis
A high level synthesis tool for MOS chip design (JPD, CCL, MMT), pp. 308–314.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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